Japanese Patent Application Laid-Open No. 2000-348000 (patent document 1) discloses an example of a configuration of a multi-processor system sharing main memory. A system in the patent document 1 includes a plurality of nodes each of which has the same configuration. Each of the nodes includes a plurality of CPUs (Central Processing Units) and modules such as a cache module, a main memory module, an input-output module, a crossbar switch module, and the like. Each node connects with each other through its own crossbar switch module.
The system disclosed in the patent document 1 includes a plurality of CPUs. Therefore, the system may continue processes, even though the CPU transfers to a power-saving state after the system causes the CPU to be in an idle state according to a load state. The term “power-saving state” here is a state of the system which appears when the system stops supplying power and a clock signal to the CPU.